CPU/Memory Uniboard

501-6178	501-7539
0MB w/o USIII w/o Cache	0MB w/o USIII w/o Cache April 2006
501-6150	501-6112
0MB 501-6178 4 × 4MB Ecache w/o USIII	0MB 501-6178 8 × 4MB Ecache w/o USIII

540-5051	2 × 900MHz USIII Cu 0MB FRU	August 2001	Tyco Socket	Cheetah+ 2.1/2.2/2.3
540-5821	2 × 900MHz USIII Cu 0MB FRU	February 2003	<= -04 Tyco Socket -05 Cinch Socket	Cheetah+ 2.3 PEEK
540-6078	2 × 900MHz USIII Cu 0MB FRU	December 2003	Cinch Socket	Cheetah+ 2.1/2.2/2.3 or 2.3 PEEK
559-0072 *	2 × 900MHz USIII Cu 0MB FRU		Cinch Socket	Relabeled 540-6078 with L2 Cache rework (used to support FCO A0248) (DPCO 481)
540-5052	4 × 900MHz USIII Cu 0MB FRU	August 2001	Tyco Socket	Cheetah+ 2.1/2.2/2.3
540-5825	4 × 900MHz USIII Cu 0MB FRU	February 2003	<= -04 Tyco Socket -05 Cinch Socket	Cheetah+ 2.3 PEEK
540-6079	4 × 900MHz USIII Cu 0MB FRU	December 2003	Cinch Socket	Cheetah+ 2.1/2.2/2.3 or 2.3 PEEK
559-0067 *	4 × 900MHz USIII Cu 0MB FRU		Cinch Socket	Relabeled 540-6079 with L2 Cache rework (used to support FCO A0248) (DPCO 481)
540-5623	2 × 1050MHz USIII Cu 0MB FRU	August 2001	Tyco Socket	Cheetah+ 2.3
540-5795	2 × 1050MHz USIII Cu 0MB FRU	February 2003	<= -04 Tyco Socket -05 Cinch Socket	Cheetah+ 2.3 PEEK
540-6080	2 × 1050MHz USIII Cu 0MB FRU	December 2003	Cinch Socket	Cheetah+ 2.3 or 2.3 PEEK
559-0073 *	2 × 1050MHz USIII Cu 0MB FRU		Cinch Socket	Relabeled 540-6080 with L2 Cache rework (used to support FCO A0248) (DPCO 481)
540-5267	4 × 1050MHz USIII Cu 0MB FRU	August 2001	Tyco Socket	Cheetah+ 2.3
540-5799	4 × 1050MHz USIII Cu 0MB FRU	February 2003	<= -04 Tyco Socket -05 Cinch Socket	Cheetah+ 2.3 PEEK
540-6081	4 × 1050MHz USIII Cu 0MB FRU	December 2003	Cinch Socket	Cheetah+ 2.3 or 2.3 PEEK
559-0068 *	4 × 1050MHz USIII Cu 0MB FRU		Cinch Socket	Relabeled 540-6081 with L2 Cache rework (used to support FCO A0248) (DPCO 481)
540-5691	2 × 1200MHz USIII Cu 0MB FRU	January 2003	<= -03 Tyco Socket -04 Cinch Socket	Cheetah++
540-6082	2 × 1200MHz USIII Cu 0MB FRU	December 2003	Cinch Socket	Cheetah++
559-0074 *	2 × 1200MHz USIII Cu 0MB FRU		Cinch Socket	Relabeled 540-6082 with L2 Cache rework (used to support FCO A0248) (DPCO 481)
540-6848	2 × 1200MHz USIII Cu 0MB FRU	April 2006	Cinch Socket	Cheetah++
540-5605	4 × 1200MHz USIII Cu 0MB FRU	January 2003	<= -03 Tyco Socket -04 Cinch Socket	Cheetah++
540-6083	4 × 1200MHz USIII Cu 0MB FRU	December 2003	Cinch Socket	Cheetah++
559-0069 *	4 × 1200MHz USIII Cu 0MB FRU		Cinch Socket	Relabeled 540-6083 with L2 Cache rework (used to support FCO A0248) (DPCO 481)
540-6849	4 × 1200MHz USIII Cu 0MB FRU	April 2006	Cinch Socket	Cheetah++

* The 559 class code is used to separate new (540) and used (559) parts in Operations.
UniBoards labeled 559 are repaired and relabeled with a 540 class code upon failure.

CPU1 and CPU0 Memory SOCKET CPU BANK DIMM J14600 J14601 J14500 J14501 J14400 J14401 J14300 J14301 P1 P1 P1 P1 P1 P1 P1 P1 B0 B1 B0 B1 B0 B1 B0 B1 D3 D3 D2 D2 D1 D1 D0 D0 J13600 J13601 J13500 J13501 J13400 J13401 J13300 J13301 P0 P0 P0 P0 P0 P0 P0 P0 B0 B1 B0 B1 B0 B1 B0 B1 D3 D3 D2 D2 D1 D1 D0 D0

CPU3 and CPU2 Memory SOCKET CPU BANK DIMM J16600 J16601 J16500 J16501 J16400 J16401 J16300 J16301 P3 P3 P3 P3 P3 P3 P3 P3 B0 B1 B0 B1 B0 B1 B0 B1 D3 D3 D2 D2 D1 D1 D0 D0 J15600 J15601 J15500 J15501 J15400 J15401 J15300 J15301 P2 P2 P2 P2 P2 P2 P2 P2 B0 B1 B0 B1 B0 B1 B0 B1 D3 D3 D2 D2 D1 D1 D0 D0