Why are the FPGA Hardware revision stats on my Acme Packet NIU showing as 0.00?

Asset ID:	1-75-2175111.1
Update Date:	2017-06-01
Keywords:

Solution Type Troubleshooting Sure

Solution 2175111.1 : Why are the FPGA Hardware revision stats on my Acme Packet NIU showing as 0.00?

Applies to:

Acme Packet 4500 - Version S-Cx6.4.x and later
Acme Packet 3820 - Version S-Cx6.4.x and later
Information in this document applies to any platform.

Purpose

Why are the FPGA Hardware revision stats on my Acme Packet NIU showing as 0.00?

here's how you can tell what revision you have.

Troubleshooting Steps

Why are the FPGA Hardware revision stats on my NIU showing as 0.00?

Note: the commands 'show qos revision' or 'show datapath ppx info' may show the QOS as revision 0.00.

======== QoS Stats ===========
QoS FPGA Hardware Revision is 0.00

This can be caused by the SBC having a missing or expired QOS license. If the SBC does not have a QOS license, you can view the revision from diagnostics with the command 'show system'.

----

You can view the FPGA revision from the diagnostics with the 'show system' command. Look for a line with the FPGA Rev: equals a hex value. Here is how you run the show system command:

1) After booting in to diags , but before running the 'Jtag' command to update the FPGA firmware you can run the 'show system' command. This will show the current FPGA revision. In the example below the current revision is 1.109 hex value = ( 0x00010109 ) , before the upgrade.

-> dc

[diag_proc] -> show system

CommE : Radisys Comm Express MCH GM45.
CommE : Installed Memory is 8 GB.
CommE DDR3 DIMM 0 : Mfg:01ce Y/W:2015-51 MHz:1333 S/N:0019300408 P/N:U51U6400N8SD-ACF-O
CommE DDR3 DIMM 1 : Mfg:01ce Y/W:2015-51 MHz:1333 S/N:0019300418 P/N:U51U6400N8SD-ACF-O

CPLD Versions:
CPLD Kif Date Code: 0xb6170392 (06/23/11 15:14 EST)
CPLD Amy Date Code: 0xa20d0270 (02/13/10 10:24 EST)

PHY 4p GBE SFP QOS/DSP Control CPLD Rev: 1.03
=== >>> PHY 4p GBE SFP QOS/DSP Config FPGA Rev: 0x00010109 <<<===

2) Proceed to update the FPGA firmware with the 'jtag' command and correct *.evf file.

[diag_proc] -> jtag /code/PRG-0059-00r2p20_0619_program.evf
...execute file "/code/PRG-0059-00r2p20_0619_program.evf"
Completed EVF record 10000.
Completed EVF record 20000.
Completed EVF record 30000.
.
.
.
Completed EVF record 3220000.
Completed EVF record 3230000.
Completed EVF record 3240000.
** SUCCESS **
device program returned 0x0
[diag_proc] ->

3) Power cycle unit, power switch on / off or removal of power cords and let the system boot back into diagnostics.

4 ) Verify FPGA revision - If all went well the revision should be changed to the updated version, in this example 1.20, hex value = ( 0x00010200 ).

-> dc

[diag_proc] -> show system

CPLD Versions:
CPLD Kif Date Code: 0xb6170392 (06/23/11 15:14 EST)
CPLD Amy Date Code: 0xa20d0270 (02/13/10 10:24 EST)

PHY 4p GBE SFP QOS/DSP Control CPLD Rev: 1.03
=== >>> PHY 4p GBE SFP QOS/DSP Config FPGA Rev: 0x00010200 <<<===

5 ) Change the boot parameters to boot a SBC image.

[diag_proc] -> bootChange

6) Reboot.

[diag_proc] -> reboot

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