![]() | Oracle System Handbook - ISO 7.0 May 2018 Internal/Partner Edition | ||
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Solution Type Technical Instruction Sure Solution 1540545.1 : SPARC M5-32 and M6-32 Servers: Device Paths
In this Document
Applies to:SPARC M6-32 - Version All Versions and laterSPARC M5-32 - Version All Versions and later Information in this document applies to any platform. Goal
The intent of this document is to provide the reader with an overview of how the SPARC M5-32 and M6-32 servers device paths are arranged. More details about the SPARC M5-32 and M6-32 servers IO architecture are available in the Administration Guide .
SolutionA Physical Domain is composed of one to four DCUs (DCU0, DCU1, DCU2, DCU3). Click on the following illustration to display the default PCIe I/O fabrics of a fully populated DCU0. Each PCIe and EMS slot is routed through the PCIe I/O switch fabric to its root complex. All four CMUs (CMU0–CMU3) are installed: rKVMS is supported with redundant paths, all PCIe and EMS slots are accessible, and CMUs are redundant. Click on the following illustration to display a half-populated DCU0, which contains only CMU0 and CMU3. Each PCIe and EMS slot is routed through the PCIe I/O switch fabric to its root complex. Some of the PCIe and EMS slots are routed to different root complexes when compared to a fully-populated DCU. The 2 illustrations above are applicable to the other DCUs.
Reminder about CMU/CMP considerations :
Note about PCIe device root complex failover/reconfiguration : When a CMP or CMU fails, or when a CMU is removed, the primary root complexes on that CMP or CMU will no longer be available. Depending on how you set the Oracle ILOM ioreconfigure property on the PDomain host (/Servers/PDomains/PDomain_x/HOST/ ioreconfigure), the PCIe or EMS slots will either be rerouted to their secondary (alternate) root complexes or the slots will no longer be available. If you set the ioreconfigure property to false, the PCIe I/O fabric paths will not be recreated when a CMU or CMP fails or is removed and the PDomain is restarted. For more details about ioreconfigure, please refer to the SPARC M5-32 and SPARC M6-32 Servers Administration Guide. From the ILOM shell :
Each EMS card provides access to : This illustration shows the SAS paths from the EMS modules to the drives. Note that each SSD receives SAS path from one EMS module as following (primary paths); paths A in the illustration above :
For alternate path (fully populated configuration and ioreconfigure), refer to the table below to determine the alternate root complexe and path. For example, in a fully populated configuration, HDD2 in DCU0 is accessible via EMS2 and EMS4 (primary path) : /pci@600/pci@1/pci@0/pci@0/pci@0/pci@4 pci@500/pci@1/pci@0/pci@0/pci@0/pci@4 but also from the alternate path (if primary is no longer available) /pci@380/pci@1/pci@0/pci@0/pci@0/pci@4 /pci@480/pci@1/pci@0/pci@0/pci@0/pci@4
Also note that the EMS port used to access an HDD is different from one EMS to another EMS. Which means that the target / PhyNum (as reported in the probe-scsi-all output) to access this disk is different. This can be summarized as following :
Using the same example as before, HDD2 in DCU0 is accessible via /pci@600/pci@1/pci@0/pci@0/pci@0/pci@4/scsi@0/disk@b,0 pci@500/pci@1/pci@0/pci@0/pci@0/pci@4/scsi@0/disk@9,0 but also from the alternate path (if primary is no longer available) /pci@380/pci@1/pci@0/pci@0/pci@0/pci@4/scsi@0/disk@9,0 /pci@480/pci@1/pci@0/pci@0/pci@0/pci@4/scsi@0/disk@b,0
Example from a DCU0 with /SYS/CMU3/CMP0 disabled, HDD2 is accessible from EMS2 (primary path) and EMS4 (alternate path) : {0} ok probe-scsi-all ... /pci@500/pci@1/pci@0/pci@0/pci@0/pci@4/scsi@0 ...
See SPARC M5-32 and M6-32 Servers: How to locate internal disks (Doc ID 1633233.1)
The list of root complexes and paths (primary and alternate) for each fully populated DCU can be summarized as following :
A more detailed list of DCUs, NAC names, pci slots, root complexes, primary paths, CMU/CMP is available :
Note : Depending on which SPP is selected as the PDomain SPP when Solaris is installed in the control domain, the numbering and instance number for some interfaces may be different.
The following commands are available to list the devices paths, NAC name and respective information :
Example of ldm output from the same domain: pd3% ldm list-io -l
NAME TYPE BUS DOMAIN STATUS ---- ---- --- ------ ------ pci_48 BUS pci_48 primary [pci@f00] pci_49 BUS pci_49 primary [pci@f40] [...output omitted] pci_59 BUS pci_59 primary [pci@11c0] /SYS/IOU3/PCIE3 PCIE pci_48 primary EMP [pci@f00/pci@1/pci@0/pci@6] /SYS/IOU3/EMS1/CARD/NET0 PCIE pci_48 primary OCC [pci@f00/pci@1/pci@0/pci@c/pci@0/pci@0] network@0 network@0,1 /SYS/IOU3/EMS1/CARD/SCSI PCIE pci_48 primary OCC [pci@f00/pci@1/pci@0/pci@c/pci@0/pci@4] LSI,sas@0/iport@1 LSI,sas@0/iport@4 LSI,sas@0/iport@2 LSI,sas@0/iport@8 LSI,sas@0/iport@v0 /SYS/IOU3/PCIE2 PCIE pci_49 primary OCC [pci@f40/pci@1/pci@0/pci@2] pci@0/pci@2/network@0 pci@0/pci@2/ethernet@0,1 pci@0/pci@4/ethernet@0 pci@0/pci@4/ethernet@0,1 /SYS/IOU3/PCIE5 PCIE pci_50 gd0 OCC [pci@f80/pci@1/pci@0/pci@8] SUNW,qlc@0/fp/disk SUNW,qlc@0/fp@0,0/ssd@w500000e010723441,0 SUNW,qlc@0/fp@0,0/ssd@w500000e0107637a1,0 SUNW,qlc@0/fp@0,0/ssd@w500000e010763781,0 SUNW,qlc@0/fp@0,0/ssd@w500000e0107648f1,0 SUNW,qlc@0/fp@0,0/ssd@w500000e010763e81,0 SUNW,qlc@0/fp@0,0/ses@w215000c0ff002304,0 SUNW,qlc@0/fp@0,0/ssd@w2100000c509f1d80,0 SUNW,qlc@0,1/fp/disk SUNW,qlc@0,1/fp@0,0 /SYS/IOU3/PCIE8 PCIE pci_51 primary EMP [pci@fc0/pci@1/pci@0/pci@4] /SYS/IOU3/PCIE11 PCIE pci_52 primary EMP [pci@1000/pci@1/pci@0/pci@6] /SYS/IOU3/PCIE12 PCIE pci_52 primary EMP [pci@1000/pci@1/pci@0/pci@4] /SYS/IOU3/EMS3/CARD/NET0 PCIE pci_52 primary OCC [pci@1000/pci@1/pci@0/pci@c/pci@0/pci@0] network@0 network@0,1 /SYS/IOU3/EMS3/CARD/SCSI PCIE pci_52 primary OCC [pci@1000/pci@1/pci@0/pci@c/pci@0/pci@4] LSI,sas@0/iport@8 LSI,sas@0/iport@4 LSI,sas@0/iport@2 LSI,sas@0/iport@1 LSI,sas@0/iport@v0 /SYS/IOU3/PCIE9 PCIE pci_53 primary OCC [pci@1040/pci@1/pci@0/pci@8] SUNW,qlc@0/fp/disk SUNW,qlc@0/fp@0,0/ssd@w500000e010723441,0 SUNW,qlc@0/fp@0,0/ssd@w500000e0107637a1,0 SUNW,qlc@0/fp@0,0/ssd@w500000e010763781,0 SUNW,qlc@0/fp@0,0/ssd@w500000e0107648f1,0 SUNW,qlc@0/fp@0,0/ssd@w500000e010763e81,0 SUNW,qlc@0/fp@0,0/ssd@w2100000c509f1d80,0 SUNW,qlc@0/fp@0,0/ses@w215000c0ff002304,0 SUNW,qlc@0,1/fp/disk SUNW,qlc@0,1/fp@0,0 /SYS/IOU3/PCIE10 PCIE pci_53 primary OCC [pci@1040/pci@1/pci@0/pci@2] network@0 network@0,1 /SYS/IOU3/PCIE13 PCIE pci_54 primary EMP [pci@1080/pci@1/pci@0/pci@8] /SYS/IOU3/PCIE14 PCIE pci_54 primary EMP [pci@1080/pci@1/pci@0/pci@2] /SYS/IOU3/EMS4/CARD/NET0 PCIE pci_54 primary UNK [pci@1080/pci@1/pci@0/pci@0/pci@0/pci@0] /SYS/IOU3/EMS4/CARD/SCSI PCIE pci_54 primary UNK [pci@1080/pci@1/pci@0/pci@0/pci@0/pci@4] /SYS/IOU3/PCIE15 PCIE pci_55 primary EMP [pci@10c0/pci@1/pci@0/pci@6] /SYS/IOU3/PCIE16 PCIE pci_55 primary EMP [pci@10c0/pci@1/pci@0/pci@4] /SYS/IOU3/PCIE6 PCIE pci_56 primary OCC [pci@1100/pci@1/pci@0/pci@2] SUNW,emlxs@0/fp/disk SUNW,emlxs@0/fp/tape SUNW,emlxs@0/fp@0,0 SUNW,emlxs@0,1/fp/disk SUNW,emlxs@0,1/fp/tape SUNW,emlxs@0,1/fp@0,0 /SYS/IOU3/EMS2/CARD/NET0 PCIE pci_56 primary OCC [pci@1100/pci@1/pci@0/pci@0/pci@0/pci@0] network@0 network@0,1 /SYS/IOU3/EMS2/CARD/SCSI PCIE pci_56 primary OCC [pci@1100/pci@1/pci@0/pci@0/pci@0/pci@4] LSI,sas@0/iport@v0 /SYS/IOU3/PCIE7 PCIE pci_57 primary EMP [pci@1140/pci@1/pci@0/pci@6] /SYS/IOU3/PCIE4 PCIE pci_58 primary EMP [pci@1180/pci@1/pci@0/pci@4] /SYS/IOU3/PCIE1 PCIE pci_59 primary EMP [pci@11c0/pci@1/pci@0/pci@8] /SYS/IOU3/EMS1/CARD/NET0/IOVNET.PF0 PF pci_48 primary [pci@f00/pci@1/pci@0/pci@c/pci@0/pci@0/network@0] maxvfs = 63 /SYS/IOU3/EMS1/CARD/NET0/IOVNET.PF1 PF pci_48 primary [pci@f00/pci@1/pci@0/pci@c/pci@0/pci@0/network@0,1] maxvfs = 63 /SYS/IOU3/EMS3/CARD/NET0/IOVNET.PF0 PF pci_52 primary [pci@1000/pci@1/pci@0/pci@c/pci@0/pci@0/network@0] maxvfs = 63 /SYS/IOU3/EMS3/CARD/NET0/IOVNET.PF1 PF pci_52 primary [pci@1000/pci@1/pci@0/pci@c/pci@0/pci@0/network@0,1] maxvfs = 63 /SYS/IOU3/PCIE10/IOVNET.PF0 PF pci_53 primary [pci@1040/pci@1/pci@0/pci@2/network@0] maxvfs = 63 /SYS/IOU3/PCIE10/IOVNET.PF1 PF pci_53 primary [pci@1040/pci@1/pci@0/pci@2/network@0,1] maxvfs = 63 /SYS/IOU3/EMS2/CARD/NET0/IOVNET.PF0 PF pci_56 primary [pci@1100/pci@1/pci@0/pci@0/pci@0/pci@0/network@0] maxvfs = 63 /SYS/IOU3/EMS2/CARD/NET0/IOVNET.PF1 PF pci_56 primary [pci@1100/pci@1/pci@0/pci@0/pci@0/pci@0/network@0,1] maxvfs = 63 pd3% ldm list-devices -a io
IO DEVICE PSEUDONYM BOUND OPTIONS pci@f00 pci_48 yes pci@f40 pci_49 yes pci@f80 pci_50 yes pci@fc0 pci_51 yes pci@1000 pci_52 yes pci@1040 pci_53 yes pci@1080 pci_54 yes pci@10c0 pci_55 yes pci@1100 pci_56 yes pci@1140 pci_57 yes pci@1180 pci_58 yes pci@11c0 pci_59 yes PCIEDEV pci@f00/pci@1/pci@0/pci@6 /SYS/IOU3/PCIE3 yes pci@f00/pci@1/pci@0/pci@c/pci@0/pci@0 /SYS/IOU3/EMS1/CARD/NET0 yes pci@f00/pci@1/pci@0/pci@c/pci@0/pci@4 /SYS/IOU3/EMS1/CARD/SCSI yes pci@f40/pci@1/pci@0/pci@2 /SYS/IOU3/PCIE2 yes pci@f80/pci@1/pci@0/pci@8 /SYS/IOU3/PCIE5 yes pci@fc0/pci@1/pci@0/pci@4 /SYS/IOU3/PCIE8 yes pci@1000/pci@1/pci@0/pci@6 /SYS/IOU3/PCIE11 yes pci@1000/pci@1/pci@0/pci@4 /SYS/IOU3/PCIE12 yes pci@1000/pci@1/pci@0/pci@c/pci@0/pci@0 /SYS/IOU3/EMS3/CARD/NET0 yes pci@1000/pci@1/pci@0/pci@c/pci@0/pci@4 /SYS/IOU3/EMS3/CARD/SCSI yes pci@1040/pci@1/pci@0/pci@8 /SYS/IOU3/PCIE9 yes pci@1040/pci@1/pci@0/pci@2 /SYS/IOU3/PCIE10 yes pci@1080/pci@1/pci@0/pci@8 /SYS/IOU3/PCIE13 yes pci@1080/pci@1/pci@0/pci@2 /SYS/IOU3/PCIE14 yes pci@1080/pci@1/pci@0/pci@0/pci@0/pci@0 /SYS/IOU3/EMS4/CARD/NET0 yes pci@1080/pci@1/pci@0/pci@0/pci@0/pci@4 /SYS/IOU3/EMS4/CARD/SCSI yes pci@10c0/pci@1/pci@0/pci@6 /SYS/IOU3/PCIE15 yes pci@10c0/pci@1/pci@0/pci@4 /SYS/IOU3/PCIE16 yes pci@1100/pci@1/pci@0/pci@2 /SYS/IOU3/PCIE6 yes pci@1100/pci@1/pci@0/pci@0/pci@0/pci@0 /SYS/IOU3/EMS2/CARD/NET0 yes pci@1100/pci@1/pci@0/pci@0/pci@0/pci@4 /SYS/IOU3/EMS2/CARD/SCSI yes pci@1140/pci@1/pci@0/pci@6 /SYS/IOU3/PCIE7 yes pci@1180/pci@1/pci@0/pci@4 /SYS/IOU3/PCIE4 yes pci@11c0/pci@1/pci@0/pci@8 /SYS/IOU3/PCIE1 yes IOVDEV
PCIe Device PathsIn ILOM, each end of a PCIE_LINK is represented in the NAC namespace because the PCIE_LINK represents a physical port on a chip. But both ends of the link reflect the same point in the PCIe fabric (i.e. the PCIe devPath).
BaseIO Card:
SPP KVMS & UsbEthernet targets:
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