Fujitsu SPARC M12-1
 
Fujitsu SPARC M12-2S
 
Fujitsu SPARC M12-2
 

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In this Document

Purpose

Details

References

Applies to:

Purpose

Provide additional information for message ID: M12-mbc.se

Fujitsu fault codes:

0192046A, 02002b00, 15071000, 15071002, 15071200, 15071201,
15071600, 15071601, 15071700, 15071701, 15072100, 15072101,
15072102, 05072012

Details

Type

Hardware Fault

   mbc.se

Severity

Major

Description

Fault due to a serious internal error detected by an MBC chip within itself.

This fault can occur on:

- an MBC chip on an XBU for M12-2S systems or XSCFUX on an XB-Box;

- an MBC chip on a MBU for M12-1 systems;

- an MBC chip on a CMUL for M12-2 or M12-2S systems.

Faults due to the MBC chip on an MBU or CMU can be subcategorized as follows:

- the fault can occur on a common part of the MBC chip
- the fault can occur on the part of the MBC chip dealing with the SRAM used for communication between domains and the XSCF
- the fault can occur on the part of the MBC chip dealing with the FLASH memory, where POST/Hypervisor images are stored
- the fault can occur on the part of the MBC chip that interfaces with a specific Building Block
- the fault can occur on the part of the MBC chip that provides the TTY interface for a specific XSB

Faults dealing with the portion of an MBC chip on an MBU (for M12-1 systems) or on a CMUL (for M12-2/M12-2S systems) that interfaces with an LSB can be detected by POST. If the fault was detected while running POST, such event is listed in the following categories:

- fe-tod-err: 02002b00 An error is detected by checking tod function;

If the fault is fe-tod-err, the domain stops using the tod.

Automated Response

If the fault was detected on the MBC chip of a MBU (for M12-1) / CMUL(for M12-2/2S), and the fault affects the entire MBC chip: No immediate action is taken. However, any future faults via the MBC cannot be diagnosed (because the MBC is required for diagnosis).

If the fault is on the SRAM or FLASH memory of the MBC chip, any of the domains on the CMUL/MBU may panic due to an uncorrectable error.

Impact

If the fault is fe-tod-err, the domain stop using the tod.

If the fault was detected on the MBC chip of a MBU of an M12-1 system and the fault affects the entire MBC chip: The MBU along with all its corresponding IO is deconfigured after the PPAR using the MBU reboot.

If the fault was detected on the MBC chip of a CMUL of an M12-2/2S system and the fault affects the entire MBC chip: The CMUL along with all its corresponding IO is deconfigured after the PPAR using the CMUL reboot.

For M12-1 or M12-2 systems, if the fault is on the SRAM or FLASH memory of the MBC chip, the platform will gradually become unbootable because domains will not be allowed to reboot.

For M12-2S systems, if the fault is on the SRAM or FLASH memory of the MBC chip, the Building Block is deconfigured after the domains using the CMU reboot.

Indicted Hardware

If the fault was detected on the MBC chip of a CMUL of a M12-2 or M12-2S system:

The CMUL is marked for replacement.

If the fault was detected on the MBC chip of the MBU of an M12-1 system: The MBU is marked for replacement.

Suggested Action for System Administrator

The recommended service action for this event is to schedule replacement of the affected component(s) at the earliest possible convenience. Although the hardware may be functioning, it is not intended nor recommended that the faulted component(s) remain in the system for a prolonged period of time.

Refer to the following document for the latest procedures for displaying event content in preparation for submitting a service request and applying any post-repair actions that may be required.

PSH Procedural Article for Fujitsu M10 Diagnosis (Doc ID 1525156.1)

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