Fujitsu SPARC M12-1
 
Fujitsu SPARC M12-2
 
Fujitsu SPARC M12-2S
 

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In this Document

Purpose

Details

References

Applies to:

Purpose

Provide additional information for message ID: M12-if.ce-cpu-mbc

Fujitsu fault codes:

15026100, 15026101, 15026102, 15026103, 15026104, 15026105,
15070200, 15070201, 15070202

Details

Type

Hardware Fault

   if.ce-cpu-mbc

Severity

Major

Description

Fault due to a permanent correctable errors on the interface between a CPU chip on a CMU or MBU and an MBC chip.

For M12-2 and M12-2S systems, this is detected between a CPU chip on a CMUU via BPU or a CMUL and an MBC chip on a CMUL.

For M12-1 systems, this is detected between a CPU chip and an MBC chip on an MBU.

Automated Response

No immediate action will be taken.

Impact

For M12-1 and M12-2 systems, the platform is deconfigured.

For M12-2S system, the building block is deconfigured.

Indicted Hardware

For M12-2/M12-2S systems, the CMUL is the first suspect. When accessing CPU is on the CMUU, the CMUU is the second suspect.

For M12-1 systems, the MBU is the suspect.

Suggested Action for System Administrator

The recommended service action for this event is to schedule replacement of the affected component(s) at the earliest possible convenience. Although the hardware may be functioning, it is not intended nor recommended that the faulted component(s) remain in the system for a prolonged period of time.

Refer to the following document for the latest procedures for displaying event content in preparation for submitting a service request and applying any post-repair actions that may be required.

PSH Procedural Article for Fujitsu M10 Diagnosis (Doc ID 1525156.1)

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