Fujitsu SPARC M12-2S
 

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In this Document

Purpose

Details

References

Applies to:

Purpose

Provide additional information for message ID: M12-if.ce-cpu-xb

Fujitsu fault codes:

15025100, 15025101, 15025102, 15025103, 15025200, 15025201,
15025202, 15025203

Details

Type

Hardware Fault

   if.ce-cpu-xb

Severity

Major

Description

Fault due to a permanent correctable error on the interface between a CPU chip on a CMUU or a CMUL and a XB-chip on an XBUQ, detected by a CPU.

When the number of correctable error exceeds a predetermined threshold the lane is degraded and operates at a reduced bandwidth.

Automated Response

No immediate action will be taken.

Impact

A CPU is deconfigured.

Indicted Hardware

CMUU or CMUL, where the CPU is mounted, is the first suspect. The XBUQ is the second suspect.

For M12-2S system with 2 CPU chip in a box, configuration of PCIe fabric will be changed triggered by CPU chip deconfiguration. This is taken place when ioreconfigure is set to true by setpparmode command.

Configuration of PCIe fabric is changed to maintain access to all the onboard devices and PCIe slots even when either CMUU or CMUL is deconfigured.

Suggested Action for System Administrator

The recommended service action for this event is to schedule replacement of the affected component(s) at the earliest possible convenience. Although the hardware may be functioning, it is not intended nor recommended that the faulted component(s) remain in the system for a prolonged period of time.

Refer to the following document for the latest procedures for displaying event content in preparation for submitting a service request and applying any post-repair actions that may be required.

PSH Procedural Article for Fujitsu M10 Diagnosis (Doc ID 1525156.1)

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