Fujitsu SPARC M12-2
 
Fujitsu SPARC M12-2S
 

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In this Document

Purpose

Details

References

Applies to:

Purpose

Provide additional information for message ID: M12-if.fe-cpu-cpu

Fujitsu fault codes:

01920401, 01920402, 15020000, 15020001, 15020002, 15020003

Details

Type

Hardware Fault

   if.fe-cpu-cpu

Severity

Major

Description

Fault due to a fatal error on the interface between CPU chips.

Automated Response

The single PPAR using the CPU chip is reset.

Impact

The CPU chip is deconfigured.

Configuration of PCIe fabric is changed to maintain access to all the onboard devices and PCIe slots even when either CMUU or CMUL is deconfigured.

Indicted Hardware

For M12-2/M12-2S systems, the CMUU or CMUL where this CPU chip is mounted is marked for replacement. When the fault is detected between a CPU chip on CMUL and a CPU chip on CMUU, there is a chance that a connector between CMUL and CMUU has a problem.

For M12-2/M12-2S system with 2 CPU chip in a box, configuration of PCIe fabric will be changed triggered by CPU chip deconfiguration. This takes place when ioreconfigure is set to true by setpparmode command.

Suggested Action for System Administrator

The recommended service action for this event is to schedule replacement of the affected component(s) at the earliest possible convenience. Although the hardware may be functioning, it is not intended nor recommended that the faulted component(s) remain in the system for a prolonged period of time.

Refer to the following document for the latest procedures for displaying event content in preparation for submitting a service request and applying any post-repair actions that may be required.

PSH Procedural Article for Fujitsu M10 Diagnosis (Doc ID 1525156.1)

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