Asset ID: |
1-79-2218330.1 |
Update Date: | 2017-08-10 |
Keywords: | |
Solution Type
Predictive Self-Healing Sure
Solution
2218330.1
:
M12-cpu.core.strand.fe - Internal fatal error within a strand on a SPARC64 XII CPU
Related Items |
- Fujitsu SPARC M12-1
- Fujitsu SPARC M12-2
- Fujitsu SPARC M12-2S
|
Related Categories |
- PLA-Support>Sun Systems>Sun_Other>Sun Collections>SN-OTH: Sun PSH
|
In this Document
Applies to:
Fujitsu SPARC M12-2 Fujitsu SPARC M12-2S Fujitsu SPARC M12-1 SPARC
Purpose
Provide additional information for message ID: M12-cpu.core.strand.fe
Fujitsu fault codes:
02000200, 02000201, 02000202, 02000203, 02000400, 02000401, 02000402, 02000403, 02000500, 02000501, 02000502, 02000503, 02000504, 02000600, 02000601, 02000602, 02000603, 02000700, 02000701, 02000702, 02000703, 02000704, 02000705, 02000706, 02000707, 02000708, 02000801, 02000803, 02000804, 02000806, 02000a00, 02000a01, 02000a02, 02000a03, 02000b01, 02000b02, 02000b03, 02000b04, 02000c00, 02000c01, 02000c02, 02000d00, 02000d01, 02000d02, 02001200, 02001b08, 02001b09, 02002600, 02002601, 02002700, 02002701, 02002702, 02002703, 02002704, 02002800, 02002801, 02002802, 02002803, 02002804, 02002900, 02002a00, 02002a01, 02002a02, 02002a03, 02002d00, 02002d01, 02002d02, 02002d03, 02002f00, 02002f01, 02002f02, 02003000, 02003100, 02003101, 02007e00, 15012509, 15012704
Details
Type
- Hardware Fault
- cpu.core.strand.fe
Severity
- Critical
Description
-
Fault due to an internal fatal error within a strand on a SPARC64 XII CPU detected by the CPU chip hardware.
Automated Response
- The domain using this CPU chip is reset.
Impact
-
The strand of the CPU chip is deconfigured.
Indicted Hardware
- For M12-1 systems the Motherboard is marked for replacement. For M12-2 and M12-2S systems, the related Motherboard (CMUU or CMUL) is marked for replacement.
If the fault was detected while running POST, then such events are listed in the following categories:- - fe-tick-cmp-err: 02000200 An error is detected by writing to the tick register and not getting the expected result when reading it back;
- fe-tick-intr-raise-err: 02000201 The tick interrupt did not occur despite an attempt to raise the interrupt; - fe-tick-intr-lvl-err: 02000202 The tick interrupt level is not the expected value; - fe-tick-intr-clear-err: 02000203 An attempt to clear the tick interrupt failed; - fe-stick-cmp-err: 02000400 An error is detected by writing to the stick register and not getting the expected result when reading it back; - fe-stick-intr-raise-err:02000401 The stick interrupt did not occur despite an attempt to raise the interrupt; - fe-stick-intr-lvl-err: 02000402 The stick interrupt level is not the expected value; - fe-stick-intr-clear-err:02000403 An attempt to clear the stick interrupt failed; - fe-softint-set-err: 02000500 Attempt to set the softint register failed; - fe-softint-clear-err: 02000501 Attempt to clear the softint register failed; - fe-softint-intr-lvl-err: 02000503 The softint interrupt level is not the expected value; - fe-softint-prio-lvl-err: 02000504 The softint interrupt priority is not the expected value; - fe-xcall-err: 02000600, 02000601, 02000602, 02000603 Crosscall either not issued, not expected, or timed out; - fe-l2cache-way-deconfigured 02000801, 02000803 At least one way of the L2 cache has been deconfigured due to a L2 cache fault (detected by checking ASI_AFSR); - fe-l1dcache-stlb-way-deconfigured: 02000805 At least one way of the L1 dcache or sTLB (detected by checking ASI_AFSR); - fe-l1dcache-ue: 02000804 Uncorrectable error in L1 dcache (detected by checking ASI_AFSR); - fe-afsr-err: 02000806 Invalid bit read from ASI_AFSR register; - fe-globalreg-cmp-err: 02000a00 An error is detected by writing to the global registers and not getting the expected result when reading back; - fe-yreg-cmp-err: 02000a01 An error is detected by writing to the Y register and not getting the expected result when reading back; - fe-windowreg-cmp-err: 02000a02 An error is detected by writing to the window registers and not getting the expected result when reading back; - fe-scratchreg-cmp-err: 02000a03 An error is detected by writing to the scratch registers and not getting the expected result when reading back; - fe-stchg-core-err: 02000b01 A CPU error, affecting multiple strands, is detected when checking ASI_STCHG; - fe-stchg-l1cache-err: 02000b03 A CPU L1 cache error is detected when checking ASI_STCHG - fe-stchg-l2cache-err: 02000b04 A CPU L2 cache error is detected when checking ASI_STCHG - fe-immureg-cmp-err: 02000c00 An error is detected by writing to the iMMU registers and not getting the expected result when reading back; - fe-stchg-strand-err: 02000b02 A CPU strand level error is detected when checking ASI_STCHG; - fe-itlbtag-cmp-err: 02000c01 A tag error is detected by writing to the iTLB registers and not getting the expected result when reading back; - fe-itlb-data-cmp-err: 02000c02 An error is detected by writing to the iTLB and not getting the expected result when reading back; - fe-dtlb-data-cmp-err 02000d02 An error is detected by writing to the dTLB and not getting the expected result when reading back; - fe-dtlbtag-cmp-err: 02000d01 A tag error is detected by writing to the dTLB registers and not getting the expected result when reading back; - fe-dmmureg-cmp-err: 02000d00 An error was detected by writing to the Virtual Watchpoint Address Register or Physical Watchpoint Address Register and not getting the expected result when reading back; - fe-cmuch-intr-lvl-err: 02001b08 The interrupt level caused by cmuch is not the expected value; - fe-tick-intr-clear-err: 02001b09 An attempt to clear the interrupt, caused by cmuch, failed; - fe-comm-tmo_err: 02001200 A timeout occurred when another strand was trying to communicate with this strand; - fe-no-response: 02007e00 XSCF believes that the strand is no longer running (POST does not respond to XSCF); - fe-unexpected-trap: 02000502 -Unexpected trap occurred due to a strand on this CPU chip. - fe-cipher-err: 02002900 Unexpected value generated by Cipher instruction; - fe-hstick-cmp-err: 02002a00 An error is detected by writing to the hstick register and not getting the expected result when reading it back; - fe-hstick-intr-raise-err: 02002a01 The hstick interrupt did not occur despite an attempt to raise the interrupt; - fe-hintp-cmp-err: The stick interrupt level is not the expected value; - fe-hstick-intr-clear-err: 02002a02 An attempt to clear the stick interrupt failed; - fe-otherreg-cmp-err: 02000700, 02000701, 02000702, 02000703, 02000704, 02000705, 02000706, 02000707, 02000708, 02002600, 02002601, 02002700, 02002701, 02002702, 02002703, 02002704, 02002800, 02002801, 02002802, 02002803, 02002804, 02002a03, 02002d00, 02002d01, 02002d02, 02002d03, 02002f00, 02002f01, 02002f02, 02003000, 02003100, 02003101 An error is detected by writing to the registers, which are not described above, and not getting the expected result when reading back;
Suggested Action for System Administrator
- The recommended service action for this event is to schedule replacement of the affected component(s) at the earliest possible convenience. Although the hardware may be functioning, it is not intended nor recommended that the faulted component(s) remain in the system for a prolonged period of time.
Refer to the following document for the latest procedures for displaying event content in preparation for submitting a service request and applying any post-repair actions that may be required.
PSH Procedural Article for Fujitsu M10 Diagnosis (Doc ID 1525156.1)
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