| Asset ID: |
1-79-1536501.1 |
| Update Date: | 2015-12-30 |
| Keywords: | |
Solution Type
Predictive Self-Healing Sure
Solution
1536501.1
:
M10-if.ce-cpu-mbc - Permanent correctable errors on the interface between a CPU chip on a CMUU or a CMUL and a MBC-chip on a CMUL
| Related Items |
- Fujitsu M10-4
- Fujitsu M10-4S
|
| Related Categories |
- PLA-Support>Sun Systems>Sun_Other>Sun Collections>SN-OTH: Sun PSH
|
In this Document
Applies to:
Fujitsu M10-4S
Fujitsu M10-4
SPARC
Purpose
Provide additional information for message ID: M10-if.ce-cpu-mbc
Fujitsu fault codes:
05026103, 05026104, 05026106, 05070200, 05070201, 05070202
Details
Type
- Hardware Fault
- if.ce-cpu-mbc
Severity
- Major
Description
-
Fault due to a permanent correctable errors on the interface between a CPU chip on a CMUU or a CMUL and a MBC-chip on a CMUL.
Automated Response
- No immediate action will be taken.
Impact
- For M10-1 and M10-4 systems, the platform is deconfigured.
For M10-4S system, the building block is deconfigured.
Indicted Hardware
- The CMUL is the first suspect. When accessing CPU is on CMUU, the CMUU is the second suspect.
Suggested Action for System Administrator
- The recommended service action for this event is to schedule replacement of the affected component(s) at the earliest possible convenience. Although the hardware may be functioning, it is not intended nor recommended that the faulted component(s) remain in the system for a prolonged period of time.
Refer to the following document for the latest procedures for displaying event content in preparation for submitting a service request and applying any post-repair actions that may be required.
PSH Procedural Article for Fujitsu M10 Diagnosis (Doc ID 1525156.1)
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