| Asset ID: |
1-79-1535671.1 |
| Update Date: | 2015-12-30 |
| Keywords: | |
Solution Type
Predictive Self-Healing Sure
Solution
1535671.1
:
M10-if.fe-cpu-mbc - Fatal error on the interface between a CPU chip and MBC chip.
| Related Items |
- Fujitsu M10-4
- Fujitsu M10-1
- Fujitsu M10-4S
|
| Related Categories |
- PLA-Support>Sun Systems>Sun_Other>Sun Collections>SN-OTH: Sun PSH
|
In this Document
Applies to:
Fujitsu M10-4
Fujitsu M10-4S
Fujitsu M10-1
SPARC
Purpose
Provide additional information for message ID: M10-if.fe-cpu-mbc
Fujitsu fault codes:
05070001, 05070005, 05022003, 05022004, 05022006
Details
Type
- Hardware Fault
- if.fe-cpu-mbc
Severity
- Major
Description
-
Fault due to a fatal error on the interface between a CPU chip and MBC chip.
Automated Response
- PPAR using this CPU chip is reset.
Impact
- For M10-1 or M10-4 systems, the platform is deconfigured.
- For M10-4S systems, the building block is deconfigued
Indicted Hardware
- For M10-1 systems, MBU is marked for replacement.
- For M10-4/4S systems, CMUL is marked for replacement.
Suggested Action for System Administrator
- The recommended service action for this event is to schedule replacement of the affected component(s) at the earliest possible convenience. Although the hardware may be functioning, it is not intended nor recommended that the faulted component(s) remain in the system for a prolonged period of time.
Refer to the following document for the latest procedures for displaying event content in preparation for submitting a service request and applying any post-repair actions that may be required.
PSH Procedural Article for Fujitsu M10 Diagnosis (Doc ID 1525156.1)
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