Fujitsu M10-4
 
Fujitsu M10-1
 
Fujitsu M10-4S
 

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In this Document

Purpose

Details

References

Applies to:

Purpose

Provide additional information for message ID: M10-ioc.ch.se

Fujitsu fault codes:

05050100, 05050101, 05050102, 05050103, 05050104, 05050105

Details

Type

Hardware Fault

   ioc.ch.se

Severity

Major

Description

Fault due to serious internal error detected by an IOC in a CPU chip.

Automated Response

No immediate action is taken. The domain will get a bus error due to this fault. However, the bus error may cause the domain to panic. If the domain does not panic, then the domain does not require immediate attention.

The administrator should ensure that the affected IOC is removed from the domain configuration.

Impact

The IOC is deconfigured after the domain is rebooted.

Indicted Hardware

For M10-1 systems, the MBU is marked for replacement.
For M10-4/4S systems, the CMUL is marked for replacement
For M10-4/4S system with 4 CPU chip in a box, configuration of PCIe fabric will be changed triggered by IOC deconfiguration. This takes place when ioreconfigure is set to true by setpparmode command.

If this fault was detected by the XSCF software, the fault affects an IOC. As a result of this fault, the domain may get an ECC UE, the domain may get an IO MMU error, or the domain may get a CRC error on the PCI-E bus.

Configuration of PCIe fabric is changed as follows:

- When IOC#0 in CPU#0 on CMUL is deconfigured: Configuration of PCIe switch 0 is changed to allow access from CPU#0 on CMUU to built-in 

  SAS chip, USB chip and GbE i/f #0 and #1
- When IOC#1 in CPU#0 on CMUL is deconfigured: Configuration of PCIe switch 1 is changed to allow access from CPU#0 on CMUU to the first

  PCIe slot
- When IOC#0 in CPU#1 on CMUL is deconfigured: Configuration of PCIe switch 2 is changed to allow access from CPU#1 on CMUU to the

  fourth and fifth PCIe slots
 - When IOC#1 in CPU#1 on CMUL is deconfigured: Configuration of PCIe switch 3 is changed to allow access from CPU#1 on CMUU to the

   eighth and ninth PCIe slot
- When IOC#0 in CPU#0 on CMUU is deconfigured: Configuration of PCIe switch 0 is changed to allow access from CPU#0 on CMUL to built-in

  GbE i/f #2 and #3
- When IOC#1 in CPU#0 on CMUU is deconfigured: Configuration of PCIe switch 1 is changed to allow access from CPU#0 on CMUL to the

  second and third PCIe slots
- When IOC#0 in CPU#1 on CMUU is deconfigured: Configuration of PCIe switch 2 is changed to allow access from CPU#1 on CMUL to the

  sixth and seventh PCIe slots
- When IOC#1 in CPU#1 on CMUU is deconfigured: Configuration of PCIe switch 3 is changed to allow access from CPU#1 on CMUL to the

  tenth and eleventh PCIe slot

Suggested Action for System Administrator

The recommended service action for this event is to schedule replacement of the affected component(s) at the earliest possible convenience. Although the hardware may be functioning, it is not intended nor recommended that the faulted component(s) remain in the system for a prolonged period of time.

Refer to the following document for the latest procedures for displaying event content in preparation for submitting a service request and applying any post-repair actions that may be required.

PSH Procedural Article for Fujitsu M10 Diagnosis (Doc ID 1525156.1)

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