Fujitsu M10-4
 
Fujitsu M10-1
 
Fujitsu M10-4S
 

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In this Document

Purpose

Details

References

Applies to:

Purpose

Provide additional information for message ID: M10-cpu.chip.se

Fujitsu fault codes:

05012105, 05012303

Details

Type

Hardware Fault

   cpu.chip.se

Severity

Major

Description

Fault due to an uncorrectable error (UE) detected by a SPARC64 X CPU chip within itself. The domain will experience an uncorrectable error trap due to this error.

Automated Response

No immediate action is taken. The affected CPU may take a UE trap, enter RED state or encounter a data UE. If the domain does not panic the administrator should ensure that the affected CPU is removed from the domain configuration.

Impact

The CPU chip is deconfigured the next time the domain reboots. For M10-1 systems, this means the platform becomes unbootable.

Indicted Hardware

For M10-1 systems, the Motherboard is marked for replacement. For M10-4 and M10-4S systems, the related Motherboard (CMUU or CMUL) is marked for replacement.

Configuration of PCIe fabric is changed as follows:

- When CPU#0 on CMUL is deconfigured:
Configuration of PCIe switch 0 is changed to allow access from CPU#0 on CMUU to built-in SAS chip, USB chip and GbE i/f #0 and #1.
Configuration of PCIe switch 1 is changed to allow access from CPU#0 on CMUU to the first PCIe slot.
- When CPU#1 on CMUL is deconfigured:
Configuration of PCIe switch 2 is changed to allow access from CPU#1 on CMUU to the fourth and fifth PCIe slots.
Configuration of PCIe switch 3 is changed to allow access from CPU#1 on CMUU to the eighth and ninth PCIe slot.
- When CPU#0 on CMUU is deconfigured:
Configuration of PCIe switch 0 is changed to allow access from CPU#0 on CMUL to built-in GbE i/f #2 and #3.
Configuration of PCIe switch 1 is changed to allow access from CPU#0 on CMUL to the second and third PCIe slots.
- When CPU#1 on CMUU is deconfigured:
Configuration of PCIe switch 2 is changed to allow access from CPU#1 on CMUL to the sixth and seventh PCIe slots.
Configuration of PCIe switch 3 is changed to allow access from CPU#1 on CMUL to the tenth and eleventh PCIe slot.

Suggested Action for System Administrator

The recommended service action for this event is to schedule replacement of the affected component(s) at the earliest possible convenience. Although the hardware may be functioning, it is not intended nor recommended that the faulted component(s) remain in the system for a prolonged period of time.

Refer to the following document for the latest procedures for displaying event content in preparation for submitting a service request and applying any post-repair actions that may be required.

PSH Procedural Article for Fujitsu M10 Diagnosis (Doc ID 1525156.1)

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