| Asset ID: |
1-79-1525615.1 |
| Update Date: | 2015-12-17 |
| Keywords: | |
Solution Type
Predictive Self-Healing Sure
Solution
1525615.1
:
SPSUN4V-8001-6Q - CPU-Switch Interconnect Lane Failover
| Related Items |
- SPARC M5-32
- SPARC M7-8
- SPARC T7-4
- Oracle SuperCluster M7 Hardware
- Oracle SuperCluster M6-32 Hardware
- SPARC T7-2
- SPARC M6-32
- SPARC M7-16
- SPARC T7-1
|
| Related Categories |
- PLA-Support>Sun Systems>Sun_Other>Sun Collections>SN-OTH: Sun PSH
|
In this Document
Applies to:
SPARC M5-32
Oracle SuperCluster M6-32 Hardware
SPARC M6-32
SPARC M7-8
SPARC M7-16
Information in this document applies to any platform.
Purpose
Additional Information for Message ID: SPSUN4V-8001-6Q
Details
Type: Hardware Fault
fault.asic.switch.c2c-failover, fault.cpu.generic-sparc.c2c-failover
Severity: Major
Description
During poweron testing, a lane failover has occurred on an interconnect between a CPU chip and a switch chip.
Automated Response
The hardware has automatically reconfigured the link to isolate the failing lane.
Impact
The system's capacity to correct transmission errors between CPU chips has been reduced.
Suggested Action for System Administrator
The administrator should arrange to have the FRU containing the faulty component replaced.
Refer to the following document for the latest procedures for displaying event content in preparation for submitting a service request and applying any post-repair actions that may be required.
PSH Procedural Article for ILOM-Based Diagnosis (Doc ID 1155200.1)
Additional Information
No additional information available at this time.
Attachments
This solution has no attachment
