Asset ID: |
1-72-1446831.1 |
Update Date: | 2018-01-10 |
Keywords: | |
Solution Type
Problem Resolution Sure
Solution
1446831.1
:
VSM - Repeated FSC3A46 Warm Boots after Power Up
Related Items |
- Sun StorageTek VSM System
|
Related Categories |
- PLA-Support>Sun Systems>TAPE>Virtual Tape>SN-TP: VSM
|
In this Document
Created from <SR 3-5501448421>
Applies to:
Sun StorageTek VSM System - Version 4 to 5C [Release 4.0 to 5.0]
Information in this document applies to any platform.
Symptoms
VSM performing repeating FSC3A46 statesaves - warmboots
FSC3A46_ETR_UNEXPECTED_OPERATION 0x3A46
Emperor Track and Drive Task cannot identify the operation for which status was received
Cause
There is a microcode bug in VTSS code level D02.02.02.00 which prevent the VTSS from completely destaging cache memory.
Solution
NOTE: Reference KM 1399676.1 to process the files using SPLAT
1. Get a full set of base files from the VTSS using standard processes.
2. Place files on zenobia using standard filing conventions.
3. Run the crunch_it all script.
EX: crunch_it all <enter>
4. Review the hic.dmp file to confirm the VSM has taken at least two FSC3A46 statesaves.
less hic.dmp <enter>
IUP Statesave Summary:
----------------------
SS#1 was FSC 0x3a46 (pc = 0x002b4004) on IUP 0 at 06:26:08 on 12/03/25
SS#2 was FSC 0x3a46 (pc = 0x002b4004) on IUP 4 at 13:19:38 on 12/03/25
5. Review hic.dmp file to verify microcode level is D02.02.02.00.
Example:
IML directory - D02.02.02.00
6. Review hic_stat.dia file to verify the FSC3A46 State Save happens at the end of the IML cycle:
13:17:04 FIML: Destage Cache
13:17:05 FIML: Unfencing ANV Cards
13:18:41 FIML: Enabling SM Interface Check 0s
13:18:42 FEN: Configured Cache 32768 MB
13:18:45 FIML: Unfence IUPs
13:18:55 FIML: Enabling Channels
13:19:37 FIML: IML aborted by FRL ( E14)
13:19:38 FRL : Failure Report FSC = 0x3a46 (4)
7. Create Field Task to upgrade the VTSS code to D02.10.07.00 or higher.
8. Notify customer of the repair plan.
Attachments
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