Sun Enterprise[TM] 10000 (E10K): SNMP Interconnect frequency 83.252 MHz differs from target value 100.000 MHz

Asset ID:	1-72-1007728.1
Update Date:	2016-05-19
Keywords:

Solution Type Problem Resolution Sure

Solution 1007728.1 : Sun Enterprise[TM] 10000 (E10K): SNMP Interconnect frequency 83.252 MHz differs from target value 100.000 MHz

Applies to:

Sun Enterprise 10000 Server - Version All Versions and later
All Platforms

Symptoms

When attempting to do a 'bringup -A off -l16' on a domain you see the following error message.

SNMP Interconnect frequency 83.252 MHz differs from target value 100.000 MHz.
pcs_snmp_get_frequencies() failure.
Exitcode = 71: Error in SSP software execution
POST (level=16, verbose=20) execution time 0:02
Could not execute command 'hpost -l16 ' (os status 0x4700, hpost status 71).
Error in SSP software execution

Cause

Installing new CPU's in a 10K system.

Solution

Note: Bring all domains down or you may crash any running domains

You need to set the control board clock frequency from 83MHz back to 100MHz. You can do this with the sys_clock command. Parameters supplied to the command vary depending on CPU speed. Valid options are:

* 250 Mhz
# sys_clock -p three-to-two -s -i  83333333
* 333 Mhz
# sys_clock -p two-to-one -s -i  83333333
* 400 Mhz
# sys_clock -p two-to-one -s -i 100000000
* 466 Mhz
# sys_clock -p five-to-two -s -i  93000000

400 MHz 8Mb cache notes

Mixing module speeds within a system is not supported.
A minimum of one processor per System Board is required.
Set the clock multiplier to 2:1 with the sys_clock (1m) ssp command.
System Boards 501-4347, 501-4786, and 501-4903 are not compatible with the 400MHz UltraSPARC module.
System Boards 501-5240, 501-5278, and 501-5279 are compatible with the 400MHz UltraSPARC module.
Solaris 2.5.1 (with patch > 103640-27), 2.6 (with patch > 105181-14.), and 2.7 are supported.
Use the limit-ecache-size OBP command before installing Solaris 2.5.1 and before booting Solaris 2.5.1 without patch 103640-27.
Use the limit-ecache-size OBP command before installing Solaris 2.6 and before booting Solaris 2.6 without patch 105181-14.

466 MHz Clock Notes

The minimum SSP release is 3.3.
Patch 108885-08 or later (SSP 3.3) or 110304-05 or later (SSP 3.4) is required.
Patch 103640-28 or later (Solaris 2.5.1) or 105181-14 or later (Solaris 2.6) is required.
Mixing module speeds within a system is supported.
A minimum of one processor per System Board is required.

 Compatibility Notes:

Control Board 501-5494 is required for a 5:2 clock.
Control Boards 501-4345 and 501-4839 do not support a 5:2 clock.
System Boards 501-5240, 501-5278, 501-5279, and 501-5693 are compatible with the 466MHz UltraSPARC module.
System Boards 501-4347, 501-4786, and 501-4903 are not compatible with the 466MHz UltraSPARC module.

Additional Information
See also Document: 1006381.1 - How to set control board frequency on an e10k

Note: Bring all domains down or you may crash any running domains

sysclock, control board, CB
Previously Published As 80856

References

<NOTE:1006381.1> - Sun Enterprise[TM] 10000: How to set control board frequency on e10k

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